{"id":333537,"date":"2022-05-23T15:01:06","date_gmt":"2022-05-23T15:01:06","guid":{"rendered":"http:\/\/savepearlharbor.com\/?p=333537"},"modified":"-0001-11-30T00:00:00","modified_gmt":"-0001-11-29T21:00:00","slug":"","status":"publish","type":"post","link":"https:\/\/savepearlharbor.com\/?p=333537","title":{"rendered":"\u0410 JTAG \u0442\u043e \u0443 \u0432\u0430\u0441 \u0434\u043b\u044f \u043a\u0440\u0430\u0441\u043e\u0442\u044b \u0442\u043e\u043b\u044c\u043a\u043e, \u0438\u043b\u0438 \u043d\u0443\u0436\u0435\u043d \u0437\u0430\u0447\u0435\u043c?<\/span>"},"content":{"rendered":"
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\u0414\u043e\u0431\u0440\u043e\u0433\u043e \u0432\u0441\u0435\u043c \u0432\u0440\u0435\u043c\u0435\u043d\u0438 \u0441\u0443\u0442\u043e\u043a.<\/p>\n

\u0421\u043b\u0443\u0447\u0438\u043b\u043e\u0441\u044c \u0443 \u043c\u0435\u043d\u044f \u0432 \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432\u0435 \u0447\u0442\u043e \u0441\u0432\u043e\u0431\u043e\u0434\u043d\u044b\u0445 \u043f\u0438\u043d\u043e\u0432 CPLD \u0441\u043e\u0432\u0441\u0435\u043c \u043d\u0435\u0442, \u0430 \u043d\u0443\u0436\u043d\u043e \u0434\u043e\u0431\u0430\u0432\u0438\u0442\u044c \u0435\u0449\u0451 \u043a\u0430\u043f\u043b\u044e \u0444\u0443\u043d\u043a\u0446\u0438\u043e\u043d\u0430\u043b\u0430, \u0430 \u043f\u0438\u043d\u043e\u0432 \u043d\u0435\u0442.<\/p>\n

\u0422\u043e\u043b\u044c\u043a\u043e JTAG…<\/p>\n

\u041f\u0440\u043e INTEL (ALTERA) Virtual JTAG \u0438\u0437 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a\u043e\u0432 \u043c\u0430\u043b\u043e \u043a\u0442\u043e \u043d\u0435 \u0441\u043b\u044b\u0448\u0430\u043b, \u043d\u043e \u0434\u043e\u043a\u0443\u043c\u0435\u043d\u0442\u0430\u0446\u0438\u0438 \u043d\u0435\u0442, \u043e\u0442 \u0441\u043b\u043e\u0432\u0430 \u0441\u043e\u0432\u0441\u0435\u043c. <\/p>\n

\u041a\u0430\u043a \u0434\u043e\u0441\u0442\u0443\u0447\u0430\u0442\u044c\u0441\u044f \u0434\u043e Virtual JTAG \u0438\u0437, \u043d\u0430\u043f\u0440\u0438\u043c\u0435\u0440, \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u0430?<\/p>\n

1. \u0421\u043e\u0437\u0434\u0430\u0435\u043c VirtaulJTAG.<\/h2>\n

…\u043a\u043e\u0440\u043e\u0442\u043a\u043e \u043d\u0430\u043a\u0438\u0434\u0430\u044e, \u0447\u0442\u043e\u0431 \u043c\u043e\u0437\u0433 \u0447\u0435\u043c \u043f\u043e\u043f\u0430\u043b\u043e \u043d\u0435 \u0437\u0430\u0431\u0438\u0432\u0430\u0442\u044c…\u0432\u043e\u0442, \u0437\u043d\u0430\u043a\u043e\u043c\u0430\u044f \u043a\u0430\u0440\u0442\u0438\u043d\u043a\u0430, \u044f \u0432\u044b\u0431\u0440\u0430\u043b \u0442\u0440\u0438 \u0431\u0438\u0442\u0430 \u043d\u0430 \u0430\u0434\u0440\u0435\u0441. <\/p>\n

<\/figcaption><\/figure>\n

2. \u041d\u0430\u0440\u0438\u0441\u0443\u0435\u043c \u043e\u0431\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a.<\/h2>\n

…\u0438 \u0432\u043e\u0442 \u0442\u0443\u0442 \u043d\u0430\u043c \u0442\u0430\u043a\u0438 \u043f\u043e\u043c\u043e\u0436\u0435\u0442 \u043e\u0444\u0438\u0446\u0438\u0430\u043b\u044c\u043d\u0430\u044f \u0434\u043e\u043a\u0443\u043c\u0435\u043d\u0442\u0430\u0446\u0438\u044f.<\/p>\n

\u0421\u043c\u043e\u0442\u0440\u0438\u043c \u043a\u043e\u0434:<\/p>\n

\n\u041a\u043e\u0434 Verilog<\/summary>\n
\n
module JTAG_COMPANION( \/\/ input core version input [7:0]VDR, \/\/ Outputs    output [15:0]Q, input [15:0]inDAT );  reg regINCMD = 1'b0; reg [7:0]regOUTDAT = 8'h00; reg regRESDAT = 1'b1;  \/\/ Signals and registers declared for Virtual JTAG instance wire tck, tdi; wire cdr, e1dr, e2dr, pdr, sdr, udr, uir, cir; reg  tdo; wire [2:0]ir_in; \/\/IR command register  jtag_iov4jtag_iov4_inst ( .tdo ( tdo ), .ir_in ( ir_in[2:0] ), .tck ( tck ), .tdi ( tdi ), .ir_out (), .virtual_state_cdr (cdr), .virtual_state_e1dr(e1dr), .virtual_state_e2dr(e2dr), .virtual_state_pdr (pdr), .virtual_state_sdr (sdr), .virtual_state_udr (udr), .virtual_state_uir (uir), .virtual_state_cir (cir) );  \/* Registers define *\/ `define VDR_REG_R3'b100 \/* 0 *\/ `define DAT_REG_R3'b101 \/* 1 *\/ `define CMD_REG_R3'b110 \/* 2 *\/  `define RES_REG_W3'b000  \/* 0 cocpu presents register *\/ `define DAT_REG_W3'b001  \/* 1 *\/ `define CMD_REG_C3'b010  \/* 2 Clear Command register *\/  \/\/data receiver \/\/shifts incoming data during PUSH command reg [7:0]shift_dr_in;  always @(posedge tck) begin    if(sdr)      shift_dr_in <= { tdi, shift_dr_in[7:1] }; end  \/* Command reception from console *\/ wire CMD_CLR = udr && (ir_in[2:0] == `CMD_REG_C) && tck; wire CMD_REQ = !(REGACC && !nLWR);  always @(posedge CMD_REQ or posedge CMD_CLR) begin if(CMD_CLR) begin regINCMD <= 1'h0; end else begin regINCMD <= 1'h1; \/* Command processing request *\/ end end  \/\/data receiver always @(posedge tck) begin    if(udr) begin case(ir_in[2:0])  `DAT_REG_W: regOUTDAT[7:0] <= shift_dr_in[7:0];  `RES_REG_W: regRESDAT <= shift_dr_in[0]; endcase end end  \/\/data sender reg [7:0]shift_dr_out;  always @(posedge tck) begin    if(cdr) begin case(ir_in[2:0]) \/* Read register to jtag out *\/ `VDR_REG_R: shift_dr_out[7:0] <= VDR[7:0]; `DAT_REG_R: shift_dr_out[7:0] <= inDAT[7:0]; `CMD_REG_R: shift_dr_out[7:0] <= {regINCMD, inDAT[14:8]}; endcase    end else if(sdr) begin      shift_dr_out[7:0] <= { tdi, shift_dr_out[7:1] }; end end  \/\/pass or bypass data via tdo reg always @* begin    tdo = shift_dr_out[0]; end  endmodule <\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n
\u0414\u043e\u0441\u0442\u0443\u0447\u0430\u0442\u044c\u0441\u044f \u0434\u043e Virtual JTAG \u0447\u0435\u0440\u0435\u0437 \u0441\u0442\u0430\u043d\u0434\u0430\u0440\u0442\u043d\u044b\u0435 \u0441\u0440\u0435\u0434\u0441\u0442\u0432\u0430 INTEL (ALTERA) \u043f\u0440\u043e\u0431\u043b\u0435\u043c \u043d\u0435 \u0432\u044b\u0437\u044b\u0432\u0430\u0435\u0442. <\/p>\n
3. \u0418\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u0435\u043c \u043e\u0441\u043d\u0430\u0441\u0442\u043a\u0443 quartus_stp.exe.<\/h2>\n
\u0412\u043e\u0442 \u0442\u0430\u043a \u043d\u0430\u043f\u0440\u0438\u043c\u0435\u0440: quartus_stp.exe -t send55.tcl <\/strong>(\u043d\u0435 \u0437\u0430\u0431\u044b\u0432\u0430\u0435\u043c \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432\u0430 \u0441\u043e\u0435\u0434\u0438\u043d\u0438\u0442\u044c \u043a\u0430\u043a \u043f\u043e\u043b\u043e\u0436\u0435\u043d\u043e UsbByteBlaster->Cpld).<\/p>\n
\nsend55.tcl<\/summary>\n
\n
set usb [lindex [get_hardware_names] 0] set device_name [lindex [get_device_names -hardware_name $usb] 0] puts \"*************************\" puts \"programming cable:\" puts $usb  #IR scan codes:  001 -> push #                010 -> pop  proc push {addr value} { global device_name usb open_device -device_name $device_name -hardware_name $usb  if {$value > 255} { return \"value entered exceeds 8 bits\" }  set push_value [int2bits $value] set diff [expr {8 - [string length $push_value]%8}]  if {$diff != 8} { set push_value [format %0${diff}d$push_value 0] }  puts $push_value  device_lock -timeout 10000 device_virtual_ir_shift -instance_index 0 -ir_value $addr -no_captured_ir_value device_virtual_dr_shift -instance_index 0 -dr_value $push_value -length 8 -no_captured_dr_value device_unlock close_device }  proc pop {addr} { global device_name usb variable x open_device -device_name $device_name -hardware_name $usb device_lock -timeout 10000 device_virtual_ir_shift -instance_index 0 -ir_value $addr -no_captured_ir_value set x [device_virtual_dr_shift -instance_index 0 -length 8] device_unlock close_device puts $x }  proc int2bits {i} {     set res \"\" while {$i>0} { set res [expr {$i%2}]$res set i [expr {$i\/2}]} if {$res==\"\"} {set res 0} return $res } # Read register VDR_REG_R pop 8 # Write register DAT_REG_W push 1 0x00 <\/code><\/pre>\n
\u041a\u043e\u0434 \u0434\u0435\u043c\u043e\u043d\u0441\u0442\u0440\u0438\u0440\u0443\u0435\u0442 \u0447\u0442\u0435\u043d\u0438\u0435 \u0438\u0437 \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u0430 8 \u0438 \u0437\u0430\u043f\u0438\u0441\u044c \u0432 \u0440\u0435\u0433\u0438\u0441\u0442\u0440 1 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044f USB Byte Blaster \u0438 \u043e\u0441\u043d\u0430\u0441\u0442\u043a\u0443 quartus_stp <\/strong>\u0447\u0435\u0440\u0435\u0437 VirtualJtag.<\/p>\n
\u0410 \u043d\u0430\u043c \u043d\u0443\u0436\u043d\u043e \u0447\u0442\u043e\u0431\u044b \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440 \u0434\u0435\u043b\u0430\u043b \u0442\u043e \u0436\u0435 \u0441\u0430\u043c\u043e\u0435.<\/p>\n<\/div>\n<\/details>\n
4. \u041a\u043e\u043c\u043f\u0438\u043b\u0438\u0440\u0443\u0435\u043c.<\/h2>\n
\u0417\u0430\u0448\u0438\u0432\u0430\u0435\u043c \u0432 CPLD, \u043f\u043e\u0434\u043a\u043b\u044e\u0447\u0430\u0435\u043c\u0441\u044f \u0447\u0435\u0440\u0435\u0437 SignalTAP \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044f \u043a \u043f\u0440\u0438\u043c\u0435\u0440\u0443 DE0nano \u0447\u0442\u043e\u0431 \u0443\u0432\u0438\u0434\u0435\u0442\u044c \u043a\u0430\u043a \u0440\u0430\u0431\u043e\u0442\u0430\u0435\u0442 \u043d\u0430 \u0430\u043f\u043f\u0430\u0440\u0430\u0442\u043d\u043e\u043c \u0443\u0440\u043e\u0432\u043d\u0435.<\/p>\n
\u0412\u043a\u043b\u044e\u0447\u0430\u0435\u043c SignalTAP… \u0438 \u0432\u0438\u0434\u0438\u043c \u0432\u043e\u0442 \u043a\u0430\u043a\u0443\u044e \u0438\u043d\u0442\u0435\u0440\u0435\u0441\u043d\u0443\u044e \u043a\u0430\u0440\u0442\u0438\u043d\u043a\u0443, \u0442\u043e\u0447\u043d\u0435\u0435 \u0435\u0451 \u0447\u0430\u0441\u0442\u044c:<\/p>\n
<\/figcaption><\/figure>\n
5. \u041f\u0435\u0440\u0435\u0440\u0438\u0441\u043e\u0432\u044b\u0432\u0430\u0435\u043c \u0432 \u043a\u043e\u0434.<\/h2>\n
\u041f\u043e \u043e\u0442\u0447\u0435\u0442\u0443 SignalTAP \u0432\u0438\u0434\u0438\u043c \u043a\u0430\u043a\u0438\u0435 \u0431\u0438\u0442\u044b \u043c\u0435\u043d\u044f\u044e\u0442\u0441\u044f, \u0430 \u043a\u0430\u043a\u0438\u0435 \u043e\u0441\u0442\u0430\u044e\u0442\u0441\u044f \u043d\u0435\u0438\u0437\u043c\u0435\u043d\u043d\u044b\u043c\u0438 \u043f\u0440\u0438 \u0438\u0437\u043c\u0435\u043d\u0435\u043d\u0438\u0438 \u043f\u0430\u0440\u0430\u043c\u0435\u0442\u0440\u043e\u0432 \u043f\u0435\u0440\u0435\u0434\u0430\u0447\u0438. \u041f\u0435\u0440\u0435\u0440\u0438\u0441\u043e\u0432\u044b\u0432\u0430\u0435\u043c \u0432 \u043a\u043e\u0434 \u044d\u0442\u0438 \u0438\u043d\u0442\u0435\u0440\u0435\u0441\u043d\u043e\u0441\u0442\u0438 \u0438 \u043f\u043e\u043b\u0443\u0447\u0430\u0435\u043c (\u044f \u043d\u0430\u0434\u0435\u044e\u0441\u044c \u0434\u043e\u0433\u0430\u0434\u0430\u0435\u0442\u0435\u0441\u044c \u0447\u0442\u043e \u0434\u0435\u043b\u0430\u044e \u0444\u0443\u043d\u043a\u0446\u0438\u0438 set_tck<\/strong> \u0438 set_tdi, <\/strong>\u043a\u043e\u0434 \u043c\u043e\u0436\u043d\u043e \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c \u043d\u0430 \u043b\u044e\u0431\u043e\u043c \u0434\u043e\u0441\u0442\u0443\u043f\u043d\u043e\u043c \u043e\u0431\u043e\u0440\u0443\u0434\u043e\u0432\u0430\u043d\u0438\u0438 \u043a\u043e\u0442\u043e\u0440\u043e\u0435 \u043c\u043e\u0436\u0435\u0442 \u0443\u043f\u0440\u0430\u0432\u043b\u044f\u0442\u044c \u0432\u044b\u0432\u043e\u0434\u0430\u043c\u0438 GPIO):<\/p>\n
\nHidden text<\/summary>\n
\n
#include \"vrt_jtag.h\"  int pulse_tck_hi(void) { int iOut = (JTAG_GPIO->IDR >> TDO_BIT) & 1;  set_tck(1); set_tck(0);  return iOut; }  int sendBytes(uint8_t bTMS, uint8_t bTDI) { int i; int iRet = 0;  for(i = 0;i < 8;i++) { set_tms(bTMS & 0x01); bTMS >>= 1; set_tdi(bTDI & 0x01); bTDI >>= 1; pulse_tck_hi();  if((JTAG_GPIO->IDR >> TDO_BIT) & 1) iRet |= 1 << i; }  return iRet; }  int jbi_jtag_send_byte(uint8_t bData) { int i; int iRet = 0;  for(i = 0;i < 8;i++) { set_tdi(bData & 0x01); bData >>= 1; pulse_tck_hi();  if((JTAG_GPIO->IDR >> TDO_BIT) & 1) iRet |= 1 << i; }  return iRet; }  void jbi_vrt_jtag_seq(uint8_t addr) { int i; set_tck(0);  sendBytes(0xBF, 0xFF); sendBytes(0x00, 0xFF); jbi_jtag_send_byte(0x03); jbi_jtag_send_byte(0xB3); jbi_jtag_send_byte(0x3F); jbi_jtag_send_byte(0xFC); for(i = 0;i < 11; i++) jbi_jtag_send_byte(0xFF);  sendBytes(0x3C, 0xFF); \/\/ 11h jbi_jtag_send_byte(0xFF); jbi_jtag_send_byte(0xC0); jbi_jtag_send_byte(0xEC); jbi_jtag_send_byte(0x0F); for(i = 0;i < 12; i++) jbi_jtag_send_byte(0xFF);  sendBytes(0x0F, 0xFF);\/\/ 22h jbi_jtag_send_byte(0x3F); jbi_jtag_send_byte(0x30); jbi_jtag_send_byte(0xFB); jbi_jtag_send_byte(0xC3); for(i = 0;i < 11; i++) jbi_jtag_send_byte(0xFF);  sendBytes(0xC0, 0xFF);\/\/ 32h sendBytes(0x01, 0xFF);\/\/ 33h  jbi_jtag_send_byte(0x07); jbi_jtag_send_byte(0x66); jbi_jtag_send_byte(0x7F); jbi_jtag_send_byte(0xF8); for(i = 0;i < 11; i++) jbi_jtag_send_byte(0xFF);  sendBytes(0x78, 0xFF);\/\/ 43h sendBytes(0x00, 0xFF);\/\/ 44h sendBytes(0x9C, 0x7F);\/\/ 45h sendBytes(0x07, 0xDF);\/\/ 46h sendBytes(0xC0, 0x81);\/\/ 47h sendBytes(0x01, 0x07);\/\/ 48h for(i = 0;i < 7; i++) jbi_jtag_send_byte(0x00);  sendBytes(0x3C, 0xF8);\/\/ 50h sendBytes(0x00, 0x0C);\/\/ 51h  for(i = 0;i < 16; i++) sendBytes(0x0E, 0x3C);  sendBytes(0x1E, 0x7C);\/\/ 62h sendBytes(0x00, 0x07);\/\/ 63h \/* IR Reg *\/ sendBytes(0x07, 0x1E | (addr << 5));\/\/ 64h \/* 07, DE mask 0xE0*\/ sendBytes(0x1E, 0x7E | ((addr >> 3) & 1));\/\/ 65h \/* 7E, 7F mask 0x01*\/ sendBytes(0x00, 0x06);\/\/ 66h  return; }  void jtag_vrt_reg_set(uint8_t addr, uint8_t data) { int i;  jbi_vrt_jtag_seq(addr); \/* DR Reg *\/ sendBytes(0x07, 0x1E | (data << 5));\/\/ 67h \/* 07, FE-1E mask 0xE0*\/ sendBytes(0xF0, 0xE0 | (data >> 3));\/\/ 68h \/* F0, F0-EF mask 0x1F*\/ sendBytes(0x0F, 0x0F);\/\/ 69h \/* 1F, 1F*\/  for(i = 0;i < 6; i++) pulse_tck_hi();  return; }  int jtag_vrt_reg_get(uint8_t addr) { int i, iRet;  addr |= BIT_READ; jbi_vrt_jtag_seq(addr); \/* DR Reg *\/ iRet = (sendBytes(0x07, 0x1E) >> 4) & 0xF;\/\/ 67h iRet |= (sendBytes(0x00, 0x00) << 4) & 0xF0;\/\/ 68h sendBytes(0xF0, 0xEA);\/\/ 69h sendBytes(0x0F, 0x0F);\/\/ 6Ah  for(i = 0;i < 6; i++) pulse_tck_hi();  return iRet; }  uint8_t GetCOREVersion(void) { return jtag_vrt_reg_get(VDR_REG_R); } <\/code><\/pre>\n
6. \u0427\u0442\u043e \u043d\u0430\u043c \u044d\u0442\u043e \u0434\u0430\u043b\u043e?<\/h2>\n
 \u041c\u044b \u043c\u043e\u0436\u0435\u043c \u043e\u0431\u0449\u0430\u0442\u044c\u0441\u044f \u0441 \u043d\u0430\u0448\u0438\u043c CPLD \u044f\u0434\u0440\u043e\u043c \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044f \u0432\u044b\u0432\u043e\u0434\u044b JTAG \u043a\u043e\u0442\u043e\u0440\u044b\u0435 \u0432 \u043a\u043e\u043d\u0435\u0447\u043d\u043e\u043c \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432\u0435, \u0443 \u043d\u0430\u0441, \u043d\u0443\u0436\u043d\u044b \u0431\u044b\u043b\u0438 \u0442\u043e\u043b\u044c\u043a\u043e \u0434\u043b\u044f \u0437\u0430\u043f\u0438\u0441\u0438 \u043f\u0440\u043e\u0448\u0438\u0432\u043a\u0438 \u044f\u0434\u0440\u0430 CPLD.<\/p>\n
\u0412\u0441\u0435\u043c \u043e\u0442\u043b\u0438\u0447\u043d\u043e\u0433\u043e \u0434\u043d\u044f, \u0440\u0430\u0434\u043e\u0441\u0442\u0438, \u0441\u0447\u0430\u0441\u0442\u044c\u044f \u0438 \u043f\u0443\u0441\u0442\u044c \u043f\u043e\u043b\u0443\u0447\u0430\u0435\u0442\u0441\u044f \u0442\u0430\u043a \u043a\u0430\u043a \u0437\u0430\u0434\u0443\u043c\u0430\u043d\u043e!<\/p>\n
\u0421 \u043d\u0430\u0441\u0442\u0443\u043f\u0430\u044e\u0449\u0438\u043c \u043b\u0435\u0442\u043e\u043c \u0438 \u0441\u043f\u0430\u0441\u0438\u0431\u043e \u0437\u0430 \u0432\u043d\u0438\u043c\u0430\u043d\u0438\u0435!!!<\/p>\n<\/div>\n<\/details>\n<\/div>\n<\/div>\n<\/div>\n
<\/div>\n<\/div>\n
  
 \u0441\u0441\u044b\u043b\u043a\u0430 \u043d\u0430 \u043e\u0440\u0438\u0433\u0438\u043d\u0430\u043b \u0441\u0442\u0430\u0442\u044c\u0438  https:\/\/habr.com\/ru\/post\/667258\/<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"
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\u0414\u043e\u0431\u0440\u043e\u0433\u043e \u0432\u0441\u0435\u043c \u0432\u0440\u0435\u043c\u0435\u043d\u0438 \u0441\u0443\u0442\u043e\u043a.<\/p>\n
\u0421\u043b\u0443\u0447\u0438\u043b\u043e\u0441\u044c \u0443 \u043c\u0435\u043d\u044f \u0432 \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432\u0435 \u0447\u0442\u043e \u0441\u0432\u043e\u0431\u043e\u0434\u043d\u044b\u0445 \u043f\u0438\u043d\u043e\u0432 CPLD \u0441\u043e\u0432\u0441\u0435\u043c \u043d\u0435\u0442, \u0430 \u043d\u0443\u0436\u043d\u043e \u0434\u043e\u0431\u0430\u0432\u0438\u0442\u044c \u0435\u0449\u0451 \u043a\u0430\u043f\u043b\u044e \u0444\u0443\u043d\u043a\u0446\u0438\u043e\u043d\u0430\u043b\u0430, \u0430 \u043f\u0438\u043d\u043e\u0432 \u043d\u0435\u0442.<\/p>\n
\u0422\u043e\u043b\u044c\u043a\u043e JTAG…<\/p>\n
\u041f\u0440\u043e INTEL (ALTERA) Virtual JTAG \u0438\u0437 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a\u043e\u0432 \u043c\u0430\u043b\u043e \u043a\u0442\u043e \u043d\u0435 \u0441\u043b\u044b\u0448\u0430\u043b, \u043d\u043e \u0434\u043e\u043a\u0443\u043c\u0435\u043d\u0442\u0430\u0446\u0438\u0438 \u043d\u0435\u0442, \u043e\u0442 \u0441\u043b\u043e\u0432\u0430 \u0441\u043e\u0432\u0441\u0435\u043c. <\/p>\n
\u041a\u0430\u043a \u0434\u043e\u0441\u0442\u0443\u0447\u0430\u0442\u044c\u0441\u044f \u0434\u043e Virtual JTAG \u0438\u0437, \u043d\u0430\u043f\u0440\u0438\u043c\u0435\u0440, \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u0430?<\/p>\n
1. \u0421\u043e\u0437\u0434\u0430\u0435\u043c VirtaulJTAG.<\/h2>\n
…\u043a\u043e\u0440\u043e\u0442\u043a\u043e \u043d\u0430\u043a\u0438\u0434\u0430\u044e, \u0447\u0442\u043e\u0431 \u043c\u043e\u0437\u0433 \u0447\u0435\u043c \u043f\u043e\u043f\u0430\u043b\u043e \u043d\u0435 \u0437\u0430\u0431\u0438\u0432\u0430\u0442\u044c…\u0432\u043e\u0442, \u0437\u043d\u0430\u043a\u043e\u043c\u0430\u044f \u043a\u0430\u0440\u0442\u0438\u043d\u043a\u0430, \u044f \u0432\u044b\u0431\u0440\u0430\u043b \u0442\u0440\u0438 \u0431\u0438\u0442\u0430 \u043d\u0430 \u0430\u0434\u0440\u0435\u0441. <\/p>\n
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2. \u041d\u0430\u0440\u0438\u0441\u0443\u0435\u043c \u043e\u0431\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a.<\/h2>\n
…\u0438 \u0432\u043e\u0442 \u0442\u0443\u0442 \u043d\u0430\u043c \u0442\u0430\u043a\u0438 \u043f\u043e\u043c\u043e\u0436\u0435\u0442 \u043e\u0444\u0438\u0446\u0438\u0430\u043b\u044c\u043d\u0430\u044f \u0434\u043e\u043a\u0443\u043c\u0435\u043d\u0442\u0430\u0446\u0438\u044f.<\/p>\n
\u0421\u043c\u043e\u0442\u0440\u0438\u043c \u043a\u043e\u0434:<\/p>\n
\n\u041a\u043e\u0434 Verilog<\/summary>\n
\n
module JTAG_COMPANION( \/\/ input core version input [7:0]VDR, \/\/ Outputs    output [15:0]Q, input [15:0]inDAT );  reg regINCMD = 1'b0; reg [7:0]regOUTDAT = 8'h00; reg regRESDAT = 1'b1;  \/\/ Signals and registers declared for Virtual JTAG instance wire tck, tdi; wire cdr, e1dr, e2dr, pdr, sdr, udr, uir, cir; reg  tdo; wire [2:0]ir_in; \/\/IR command register  jtag_iov4jtag_iov4_inst ( .tdo ( tdo ), .ir_in ( ir_in[2:0] ), .tck ( tck ), .tdi ( tdi ), .ir_out (), .virtual_state_cdr (cdr), .virtual_state_e1dr(e1dr), .virtual_state_e2dr(e2dr), .virtual_state_pdr (pdr), .virtual_state_sdr (sdr), .virtual_state_udr (udr), .virtual_state_uir (uir), .virtual_state_cir (cir) );  \/* Registers define *\/ `define VDR_REG_R3'b100 \/* 0 *\/ `define DAT_REG_R3'b101 \/* 1 *\/ `define CMD_REG_R3'b110 \/* 2 *\/  `define RES_REG_W3'b000  \/* 0 cocpu presents register *\/ `define DAT_REG_W3'b001  \/* 1 *\/ `define CMD_REG_C3'b010  \/* 2 Clear Command register *\/  \/\/data receiver \/\/shifts incoming data during PUSH command reg [7:0]shift_dr_in;  always @(posedge tck) begin    if(sdr)      shift_dr_in <= { tdi, shift_dr_in[7:1] }; end  \/* Command reception from console *\/ wire CMD_CLR = udr && (ir_in[2:0] == `CMD_REG_C) && tck; wire CMD_REQ = !(REGACC && !nLWR);  always @(posedge CMD_REQ or posedge CMD_CLR) begin if(CMD_CLR) begin regINCMD <= 1'h0; end else begin regINCMD <= 1'h1; \/* Command processing request *\/ end end  \/\/data receiver always @(posedge tck) begin    if(udr) begin case(ir_in[2:0])  `DAT_REG_W: regOUTDAT[7:0] <= shift_dr_in[7:0];  `RES_REG_W: regRESDAT <= shift_dr_in[0]; endcase end end  \/\/data sender reg [7:0]shift_dr_out;  always @(posedge tck) begin    if(cdr) begin case(ir_in[2:0]) \/* Read register to jtag out *\/ `VDR_REG_R: shift_dr_out[7:0] <= VDR[7:0]; `DAT_REG_R: shift_dr_out[7:0] <= inDAT[7:0]; `CMD_REG_R: shift_dr_out[7:0] <= {regINCMD, inDAT[14:8]}; endcase    end else if(sdr) begin      shift_dr_out[7:0] <= { tdi, shift_dr_out[7:1] }; end end  \/\/pass or bypass data via tdo reg always @* begin    tdo = shift_dr_out[0]; end  endmodule <\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n
\u0414\u043e\u0441\u0442\u0443\u0447\u0430\u0442\u044c\u0441\u044f \u0434\u043e Virtual JTAG \u0447\u0435\u0440\u0435\u0437 \u0441\u0442\u0430\u043d\u0434\u0430\u0440\u0442\u043d\u044b\u0435 \u0441\u0440\u0435\u0434\u0441\u0442\u0432\u0430 INTEL (ALTERA) \u043f\u0440\u043e\u0431\u043b\u0435\u043c \u043d\u0435 \u0432\u044b\u0437\u044b\u0432\u0430\u0435\u0442. <\/p>\n
3. \u0418\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u0435\u043c \u043e\u0441\u043d\u0430\u0441\u0442\u043a\u0443 quartus_stp.exe.<\/h2>\n
\u0412\u043e\u0442 \u0442\u0430\u043a \u043d\u0430\u043f\u0440\u0438\u043c\u0435\u0440: quartus_stp.exe -t send55.tcl <\/strong>(\u043d\u0435 \u0437\u0430\u0431\u044b\u0432\u0430\u0435\u043c \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432\u0430 \u0441\u043e\u0435\u0434\u0438\u043d\u0438\u0442\u044c \u043a\u0430\u043a \u043f\u043e\u043b\u043e\u0436\u0435\u043d\u043e UsbByteBlaster->Cpld).<\/p>\n
\nsend55.tcl<\/summary>\n
\n
set usb [lindex [get_hardware_names] 0] set device_name [lindex [get_device_names -hardware_name $usb] 0] puts \"*************************\" puts \"programming cable:\" puts $usb  #IR scan codes:  001 -> push #                010 -> pop  proc push {addr value} { global device_name usb open_device -device_name $device_name -hardware_name $usb  if {$value > 255} { return \"value entered exceeds 8 bits\" }  set push_value [int2bits $value] set diff [expr {8 - [string length $push_value]%8}]  if {$diff != 8} { set push_value [format %0${diff}d$push_value 0] }  puts $push_value  device_lock -timeout 10000 device_virtual_ir_shift -instance_index 0 -ir_value $addr -no_captured_ir_value device_virtual_dr_shift -instance_index 0 -dr_value $push_value -length 8 -no_captured_dr_value device_unlock close_device }  proc pop {addr} { global device_name usb variable x open_device -device_name $device_name -hardware_name $usb device_lock -timeout 10000 device_virtual_ir_shift -instance_index 0 -ir_value $addr -no_captured_ir_value set x [device_virtual_dr_shift -instance_index 0 -length 8] device_unlock close_device puts $x }  proc int2bits {i} {     set res \"\" while {$i>0} { set res [expr {$i%2}]$res set i [expr {$i\/2}]} if {$res==\"\"} {set res 0} return $res } # Read register VDR_REG_R pop 8 # Write register DAT_REG_W push 1 0x00 <\/code><\/pre>\n
\u041a\u043e\u0434 \u0434\u0435\u043c\u043e\u043d\u0441\u0442\u0440\u0438\u0440\u0443\u0435\u0442 \u0447\u0442\u0435\u043d\u0438\u0435 \u0438\u0437 \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u0430 8 \u0438 \u0437\u0430\u043f\u0438\u0441\u044c \u0432 \u0440\u0435\u0433\u0438\u0441\u0442\u0440 1 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044f USB Byte Blaster \u0438 \u043e\u0441\u043d\u0430\u0441\u0442\u043a\u0443 quartus_stp <\/strong>\u0447\u0435\u0440\u0435\u0437 VirtualJtag.<\/p>\n
\u0410 \u043d\u0430\u043c \u043d\u0443\u0436\u043d\u043e \u0447\u0442\u043e\u0431\u044b \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440 \u0434\u0435\u043b\u0430\u043b \u0442\u043e \u0436\u0435 \u0441\u0430\u043c\u043e\u0435.<\/p>\n<\/div>\n<\/details>\n
4. \u041a\u043e\u043c\u043f\u0438\u043b\u0438\u0440\u0443\u0435\u043c.<\/h2>\n
\u0417\u0430\u0448\u0438\u0432\u0430\u0435\u043c \u0432 CPLD, \u043f\u043e\u0434\u043a\u043b\u044e\u0447\u0430\u0435\u043c\u0441\u044f \u0447\u0435\u0440\u0435\u0437 SignalTAP \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044f \u043a \u043f\u0440\u0438\u043c\u0435\u0440\u0443 DE0nano \u0447\u0442\u043e\u0431 \u0443\u0432\u0438\u0434\u0435\u0442\u044c \u043a\u0430\u043a \u0440\u0430\u0431\u043e\u0442\u0430\u0435\u0442 \u043d\u0430 \u0430\u043f\u043f\u0430\u0440\u0430\u0442\u043d\u043e\u043c \u0443\u0440\u043e\u0432\u043d\u0435.<\/p>\n
\u0412\u043a\u043b\u044e\u0447\u0430\u0435\u043c SignalTAP… \u0438 \u0432\u0438\u0434\u0438\u043c \u0432\u043e\u0442 \u043a\u0430\u043a\u0443\u044e \u0438\u043d\u0442\u0435\u0440\u0435\u0441\u043d\u0443\u044e \u043a\u0430\u0440\u0442\u0438\u043d\u043a\u0443, \u0442\u043e\u0447\u043d\u0435\u0435 \u0435\u0451 \u0447\u0430\u0441\u0442\u044c:<\/p>\n
<\/figcaption><\/figure>\n
5. \u041f\u0435\u0440\u0435\u0440\u0438\u0441\u043e\u0432\u044b\u0432\u0430\u0435\u043c \u0432 \u043a\u043e\u0434.<\/h2>\n
\u041f\u043e \u043e\u0442\u0447\u0435\u0442\u0443 SignalTAP \u0432\u0438\u0434\u0438\u043c \u043a\u0430\u043a\u0438\u0435 \u0431\u0438\u0442\u044b \u043c\u0435\u043d\u044f\u044e\u0442\u0441\u044f, \u0430 \u043a\u0430\u043a\u0438\u0435 \u043e\u0441\u0442\u0430\u044e\u0442\u0441\u044f \u043d\u0435\u0438\u0437\u043c\u0435\u043d\u043d\u044b\u043c\u0438 \u043f\u0440\u0438 \u0438\u0437\u043c\u0435\u043d\u0435\u043d\u0438\u0438 \u043f\u0430\u0440\u0430\u043c\u0435\u0442\u0440\u043e\u0432 \u043f\u0435\u0440\u0435\u0434\u0430\u0447\u0438. \u041f\u0435\u0440\u0435\u0440\u0438\u0441\u043e\u0432\u044b\u0432\u0430\u0435\u043c \u0432 \u043a\u043e\u0434 \u044d\u0442\u0438 \u0438\u043d\u0442\u0435\u0440\u0435\u0441\u043d\u043e\u0441\u0442\u0438 \u0438 \u043f\u043e\u043b\u0443\u0447\u0430\u0435\u043c (\u044f \u043d\u0430\u0434\u0435\u044e\u0441\u044c \u0434\u043e\u0433\u0430\u0434\u0430\u0435\u0442\u0435\u0441\u044c \u0447\u0442\u043e \u0434\u0435\u043b\u0430\u044e \u0444\u0443\u043d\u043a\u0446\u0438\u0438 set_tck<\/strong> \u0438 set_tdi, <\/strong>\u043a\u043e\u0434 \u043c\u043e\u0436\u043d\u043e \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c \u043d\u0430 \u043b\u044e\u0431\u043e\u043c \u0434\u043e\u0441\u0442\u0443\u043f\u043d\u043e\u043c \u043e\u0431\u043e\u0440\u0443\u0434\u043e\u0432\u0430\u043d\u0438\u0438 \u043a\u043e\u0442\u043e\u0440\u043e\u0435 \u043c\u043e\u0436\u0435\u0442 \u0443\u043f\u0440\u0430\u0432\u043b\u044f\u0442\u044c \u0432\u044b\u0432\u043e\u0434\u0430\u043c\u0438 GPIO):<\/p>\n
\nHidden text<\/summary>\n
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#include \"vrt_jtag.h\"  int pulse_tck_hi(void) { int iOut = (JTAG_GPIO->IDR >> TDO_BIT) & 1;  set_tck(1); set_tck(0);  return iOut; }  int sendBytes(uint8_t bTMS, uint8_t bTDI) { int i; int iRet = 0;  for(i = 0;i < 8;i++) { set_tms(bTMS & 0x01); bTMS >>= 1; set_tdi(bTDI & 0x01); bTDI >>= 1; pulse_tck_hi();  if((JTAG_GPIO->IDR >> TDO_BIT) & 1) iRet |= 1 << i; }  return iRet; }  int jbi_jtag_send_byte(uint8_t bData) { int i; int iRet = 0;  for(i = 0;i < 8;i++) { set_tdi(bData & 0x01); bData >>= 1; pulse_tck_hi();  if((JTAG_GPIO->IDR >> TDO_BIT) & 1) iRet |= 1 << i; }  return iRet; }  void jbi_vrt_jtag_seq(uint8_t addr) { int i; set_tck(0);  sendBytes(0xBF, 0xFF); sendBytes(0x00, 0xFF); jbi_jtag_send_byte(0x03); jbi_jtag_send_byte(0xB3); jbi_jtag_send_byte(0x3F); jbi_jtag_send_byte(0xFC); for(i = 0;i < 11; i++) jbi_jtag_send_byte(0xFF);  sendBytes(0x3C, 0xFF); \/\/ 11h jbi_jtag_send_byte(0xFF); jbi_jtag_send_byte(0xC0); jbi_jtag_send_byte(0xEC); jbi_jtag_send_byte(0x0F); for(i = 0;i < 12; i++) jbi_jtag_send_byte(0xFF);  sendBytes(0x0F, 0xFF);\/\/ 22h jbi_jtag_send_byte(0x3F); jbi_jtag_send_byte(0x30); jbi_jtag_send_byte(0xFB); jbi_jtag_send_byte(0xC3); for(i = 0;i < 11; i++) jbi_jtag_send_byte(0xFF);  sendBytes(0xC0, 0xFF);\/\/ 32h sendBytes(0x01, 0xFF);\/\/ 33h  jbi_jtag_send_byte(0x07); jbi_jtag_send_byte(0x66); jbi_jtag_send_byte(0x7F); jbi_jtag_send_byte(0xF8); for(i = 0;i < 11; i++) jbi_jtag_send_byte(0xFF);  sendBytes(0x78, 0xFF);\/\/ 43h sendBytes(0x00, 0xFF);\/\/ 44h sendBytes(0x9C, 0x7F);\/\/ 45h sendBytes(0x07, 0xDF);\/\/ 46h sendBytes(0xC0, 0x81);\/\/ 47h sendBytes(0x01, 0x07);\/\/ 48h for(i = 0;i < 7; i++) jbi_jtag_send_byte(0x00);  sendBytes(0x3C, 0xF8);\/\/ 50h sendBytes(0x00, 0x0C);\/\/ 51h  for(i = 0;i < 16; i++) sendBytes(0x0E, 0x3C);  sendBytes(0x1E, 0x7C);\/\/ 62h sendBytes(0x00, 0x07);\/\/ 63h \/* IR Reg *\/ sendBytes(0x07, 0x1E | (addr << 5));\/\/ 64h \/* 07, DE mask 0xE0*\/ sendBytes(0x1E, 0x7E | ((addr >> 3) & 1));\/\/ 65h \/* 7E, 7F mask 0x01*\/ sendBytes(0x00, 0x06);\/\/ 66h  return; }  void jtag_vrt_reg_set(uint8_t addr, uint8_t data) { int i;  jbi_vrt_jtag_seq(addr); \/* DR Reg *\/ sendBytes(0x07, 0x1E | (data << 5));\/\/ 67h \/* 07, FE-1E mask 0xE0*\/ sendBytes(0xF0, 0xE0 | (data >> 3));\/\/ 68h \/* F0, F0-EF mask 0x1F*\/ sendBytes(0x0F, 0x0F);\/\/ 69h \/* 1F, 1F*\/  for(i = 0;i < 6; i++) pulse_tck_hi();  return; }  int jtag_vrt_reg_get(uint8_t addr) { int i, iRet;  addr |= BIT_READ; jbi_vrt_jtag_seq(addr); \/* DR Reg *\/ iRet = (sendBytes(0x07, 0x1E) >> 4) & 0xF;\/\/ 67h iRet |= (sendBytes(0x00, 0x00) << 4) & 0xF0;\/\/ 68h sendBytes(0xF0, 0xEA);\/\/ 69h sendBytes(0x0F, 0x0F);\/\/ 6Ah  for(i = 0;i < 6; i++) pulse_tck_hi();  return iRet; }  uint8_t GetCOREVersion(void) { return jtag_vrt_reg_get(VDR_REG_R); } <\/code><\/pre>\n
6. \u0427\u0442\u043e \u043d\u0430\u043c \u044d\u0442\u043e \u0434\u0430\u043b\u043e?<\/h2>\n
 \u041c\u044b \u043c\u043e\u0436\u0435\u043c \u043e\u0431\u0449\u0430\u0442\u044c\u0441\u044f \u0441 \u043d\u0430\u0448\u0438\u043c CPLD \u044f\u0434\u0440\u043e\u043c \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044f \u0432\u044b\u0432\u043e\u0434\u044b JTAG \u043a\u043e\u0442\u043e\u0440\u044b\u0435 \u0432 \u043a\u043e\u043d\u0435\u0447\u043d\u043e\u043c \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432\u0435, \u0443 \u043d\u0430\u0441, \u043d\u0443\u0436\u043d\u044b \u0431\u044b\u043b\u0438 \u0442\u043e\u043b\u044c\u043a\u043e \u0434\u043b\u044f \u0437\u0430\u043f\u0438\u0441\u0438 \u043f\u0440\u043e\u0448\u0438\u0432\u043a\u0438 \u044f\u0434\u0440\u0430 CPLD.<\/p>\n
\u0412\u0441\u0435\u043c \u043e\u0442\u043b\u0438\u0447\u043d\u043e\u0433\u043e \u0434\u043d\u044f, \u0440\u0430\u0434\u043e\u0441\u0442\u0438, \u0441\u0447\u0430\u0441\u0442\u044c\u044f \u0438 \u043f\u0443\u0441\u0442\u044c \u043f\u043e\u043b\u0443\u0447\u0430\u0435\u0442\u0441\u044f \u0442\u0430\u043a \u043a\u0430\u043a \u0437\u0430\u0434\u0443\u043c\u0430\u043d\u043e!<\/p>\n
\u0421 \u043d\u0430\u0441\u0442\u0443\u043f\u0430\u044e\u0449\u0438\u043c \u043b\u0435\u0442\u043e\u043c \u0438 \u0441\u043f\u0430\u0441\u0438\u0431\u043e \u0437\u0430 \u0432\u043d\u0438\u043c\u0430\u043d\u0438\u0435!!!<\/p>\n<\/div>\n<\/details>\n<\/div>\n<\/div>\n<\/div>\n
<\/div>\n<\/div>\n
  
 \u0441\u0441\u044b\u043b\u043a\u0430 \u043d\u0430 \u043e\u0440\u0438\u0433\u0438\u043d\u0430\u043b \u0441\u0442\u0430\u0442\u044c\u0438  https:\/\/habr.com\/ru\/post\/667258\/<\/a>
<\/br><\/br><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"class_list":["post-333537","post","type-post","status-publish","format-standard","hentry"],"_links":{"self":[{"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/posts\/333537","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=333537"}],"version-history":[{"count":0,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/posts\/333537\/revisions"}],"wp:attachment":[{"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=333537"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=333537"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=333537"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}