{"id":365485,"date":"2024-05-21T02:39:16","date_gmt":"2024-05-21T02:39:16","guid":{"rendered":"http:\/\/savepearlharbor.com\/?p=365485"},"modified":"-0001-11-30T00:00:00","modified_gmt":"-0001-11-29T21:00:00","slug":"","status":"publish","type":"post","link":"https:\/\/savepearlharbor.com\/?p=365485","title":{"rendered":"The next steps after a good meetup on Portable SystemVerilog Examples for ASIC and FPGA<\/span>"},"content":{"rendered":"
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The meetup on January 14 at Hacker Dojo in Mountain View, California, went well, although not as planned — we spent almost all the time talking instead of doing hands-on exercises. The room we booked can fit 30 people and approximately 30 people did show up. The quality of participants was high: approximately half were familiar with hardware description languages and another half came from various software topics. 12 people filled out the questionnaire<\/a> despite the fact that I forgot to bring 30 pens.<\/p>\n

The discussion during and after the presentation<\/a> was focused and very meaningful: microarchitecture and education, EDA infrastructure \/ build scripts, open-source ASIC design tools, the economics of ASIC design and manufacturing, high-level synthesis, transaction-level modeling, ASIC prototyping using FPGA boards, FPGA embedded in ASIC (Menta), new FPGA manufacturers (Gowin) and new design languages — Chisel and SpinalHDL.<\/p>\n

Four persons came to me after the meeting to discuss their participation in working on open-source portable SystemVerilog examples, and another seven expressed this intention in the questionnaire. So we are meeting again in Hacker Dojo on Sunday, January 21, at 2 PM, this time not in the classroom area, but in the common shared area.<\/p>\n

Generally, I am thinking of having regular meetings, probably on a weekly basis for a small team of developers of the educational materials and on a monthly basis for a wider audience, discussing various design and verification topics.<\/p>\n

There were two correspondents of Slavic Sacramento<\/a> who recorded the video of the presentation: <\/p>\n

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The information to run the examples<\/strong><\/p>\n

While I did show four persons how to run the examples, I had to print an instruction and put it near every computer, which I did not. After the meeting, I inserted three slides into the presentation with a brief instruction. The instruction works both under Linux and Windows, although in order to run Bash scripts under Windows you have to use Bash from Git for Windows.<\/p>\n

Slide 8:<\/strong><\/p>\n

The public project repositories<\/p>\n

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  1. \n

    https:\/\/github.com\/yuri-panchul\/basics-graphics-music<\/u><\/a><\/p>\n<\/li>\n

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    https:\/\/github.com\/yuri-panchul\/systemverilog-homework<\/u><\/a><\/p>\n

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      This is a public version of the corresponding private repository. The private repository contains solutions to all the problems<\/p>\n<\/li>\n<\/ol>\n<\/li>\n

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      valid-ready-etc — under construction<\/p>\n<\/li>\n<\/ol>\n

      Slide 9:<\/strong><\/p>\n

      How to start working with the examples<\/p>\n

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      1. \n

        Install the applicable toolchain<\/p>\n<\/li>\n

      2. \n

        Connect the board<\/p>\n<\/li>\n

      3. \n

        git clone https:\/\/github.com\/yuri-panchul\/basics-graphics-music.git<\/u><\/a><\/p>\n<\/li>\n

      4. \n

        cd basics-graphics-music\/labs\/07_binary_counter<\/p>\n<\/li>\n

      5. \n

        .\/03_synthesize_for_fpga.bash<\/p>\n<\/li>\n

      6. \n

        After the synthesis finishes, you should see the running lights<\/p>\n<\/li>\n

      7. \n

        If anything goes wrong, the script will tell you what to do<\/p>\n<\/li>\n<\/ol>\n

        Slide 10:<\/strong><\/p>\n

        How to start working with the examples — more details<\/p>\n

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        1. \n

          git clone https:\/\/github.com\/yuri-panchul\/basics-graphics-music.git<\/u><\/a><\/p>\n