{"id":401784,"date":"2024-06-29T16:05:08","date_gmt":"2024-06-29T16:05:08","guid":{"rendered":"http:\/\/savepearlharbor.com\/?p=401784"},"modified":"-0001-11-30T00:00:00","modified_gmt":"-0001-11-29T21:00:00","slug":"","status":"publish","type":"post","link":"https:\/\/savepearlharbor.com\/?p=401784","title":{"rendered":"<span>Testing a Monitor using DE10-Lite<\/span>"},"content":{"rendered":"<div><!--[--><!--]--><\/div>\n<div id=\"post-content-body\">\n<div>\n<div class=\"article-formatted-body article-formatted-body article-formatted-body_version-2\">\n<div xmlns=\"http:\/\/www.w3.org\/1999\/xhtml\">\n<h2>Introduction<\/h2>\n<p>In order not to buy a defective monitor, it is highly recommended to check it before buying. DE10-Lite is great for this because of a compact size and the presence of a VGA connector.<\/p>\n<h2>Hardware and software<\/h2>\n<ul>\n<li>\n<p>DE10-Lite board (based on Altera&#8217;s MAX 10 FPGA) <\/p>\n<\/li>\n<\/ul>\n<figure class=\"full-width\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/habrastorage.org\/r\/w780q1\/getpro\/habr\/upload_files\/9a8\/108\/f5e\/9a8108f5e2522a2d2485d8e9910f0d17.jpg\" width=\"1800\" height=\"1880\" data-src=\"https:\/\/habrastorage.org\/getpro\/habr\/upload_files\/9a8\/108\/f5e\/9a8108f5e2522a2d2485d8e9910f0d17.jpg\" data-blurred=\"true\"\/><figcaption><\/figcaption><\/figure>\n<ul>\n<li>\n<p>Quartus Prime Lite Edition<\/p>\n<\/li>\n<li>\n<p>Verilog HDL<\/p>\n<\/li>\n<\/ul>\n<h2>Some words about VGA and clock division<\/h2>\n<p><strong>VGA<\/strong>\u00a0(Video Graphics Array) is an analogue interface used to display visual data on computer monitors.\u00a0Till a few years back, it was the most used display interface.\u00a0It is now\u00a0being slowly replaced by HDMI.<\/p>\n<p>To display an image using VGA, we must follow its specification:\u00a0<strong>timings<\/strong>\u00a0and\u00a0<strong>clock rate<\/strong>.\u00a0In this paragraph I will consider only the clock rate.\u00a0Information about the timing is provided in the next block.<\/p>\n<p>VGA needs\u00a0<strong>25.175\u00a0MHz<\/strong>\u00a0clock rate, but the DE10-Lite can only provide 10 MHz or 50 MHz clock.\u00a0Therefore, we must somehow obtain\u00a0<strong>25.175\u00a0MHz\u00a0<\/strong>by dividing or multiplying the existing clocks.\u00a0In this project, I will divide 50 MHz clock.\u00a0<\/p>\n<p>To obtain the required clock, I used\u00a0<strong>Altera Phase-Locked Loop (Altera PLL)\u00a0<\/strong>from the IP catalogue in Quartus Prime.<\/p>\n<h2>Displaying an image on the screen through the VGA protocol<\/h2>\n<p>In this project I will use 640&#215;480 at 60 Hz.\u00a0 <br \/>Therefore, we have to follow the following timings:<\/p>\n<figure class=\"full-width\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/habrastorage.org\/r\/w1560\/getpro\/habr\/upload_files\/7eb\/c21\/f82\/7ebc21f8242a31ccf2dc570c66de86b3.png\" width=\"566\" height=\"553\" data-src=\"https:\/\/habrastorage.org\/getpro\/habr\/upload_files\/7eb\/c21\/f82\/7ebc21f8242a31ccf2dc570c66de86b3.png\"\/><figcaption><\/figcaption><\/figure>\n<details class=\"spoiler\">\n<summary>Code of the VGA controller<\/summary>\n<div class=\"spoiler__content\">\n<pre><code class=\"vhdl\">module VGA( input clock25MHz, output vsync, output hsync, output canDisplayImage, output reg[9:0] x, output reg[9:0] y ); reg [9:0] xCounter; reg [9:0] yCounter;  always @(posedge clock25MHz)  \/\/ horizontal counter begin  if (xCounter &lt; 799) xCounter &lt;= xCounter + 1; else xCounter &lt;= 0;               end    always @ (posedge clock25MHz)  \/\/ vertical counter begin  if (xCounter == 799)  \/\/ only counts up 1 count after horizontal finishes 800 counts begin if (yCounter &lt; 525)  \/\/ vertical counter (including off-screen vertical 45 pixels) total of 525 pixels yCounter &lt;= yCounter + 1; else yCounter &lt;= 0;               end   end  always @ (posedge clock25MHz) begin if(xCounter>=144 &amp;&amp; xCounter&lt;784) x=xCounter-144; else x = 0; if(yCounter>=35 &amp;&amp; yCounter &lt; 515) y = yCounter-35; else y = 0; end  assign hsync = (xCounter >= 0 &amp;&amp; xCounter &lt; 96) ? 1:0;  \/\/ hsync high for 96 counts                                                  assign vsync = (yCounter >= 0 &amp;&amp; yCounter &lt; 2) ? 1:0;   \/\/ vsync high for 2 counts assign canDisplayImage = ((xCounter > 144) &amp;&amp; (xCounter &lt;= 783))      &amp;&amp; ((yCounter > 35) &amp;&amp; (yCounter &lt;= 514));  endmodule<\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n<p>Now, when the board can display any image on a screen, it&#8217;s time to draw something.<\/p>\n<p>Using x and y, we can control each pixel.\u00a0For example, the part of the code that draws a white 100&#215;100 rectangle:<\/p>\n<details class=\"spoiler\">\n<summary>Drawing a 100&#215;100 square<\/summary>\n<div class=\"spoiler__content\">\n<pre><code>module tvPattern( input [9:0] x, input [9:0] y, output reg [3:0] red, output reg [3:0] green, output reg [3:0] blue);  always @(x||y) begin if(x>=0 &amp;&amp; x&lt;100 &amp;&amp; y>=0 &amp;&amp; y&lt;100))  begin red &lt;= 4'hF; green &lt;= 4'hF; blue &lt;= 4'hF; end end    endmodule<\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n<h2>Animated test<\/h2>\n<p>I decided to add an animated test (e.g. bouncing square).<br \/>The variables for squareX and squareY are created.\u00a0<br \/>Then, in sequential logic block <code>always @(posedge clock25MHz<\/code>), I\u00a0am checking\u00a0for collisions with\u00a0screen borders and if collision &#8212; change the direction of the square.<\/p>\n<details class=\"spoiler\">\n<summary>Moving square<\/summary>\n<div class=\"spoiler__content\">\n<pre><code class=\"vhdl\">module bouncingSquare( input clock25MHz, input [9:0] x, input [9:0] y, output [3:0] red, output [3:0] green, output [3:0] blue ); localparam SQUARE_SIZE = 20;  \/\/ Position of a square reg [9:0] squareX =100; reg [9:0] squareY = 100;  \/\/ Vertical and horizontal speeds \/\/ 1 - positive direction, 0 - negative direction reg vSpeed = 1; reg hSpeed = 1;  \/\/ Checking for collisions wire topCollision = (squareY-SQUARE_SIZE==0);     wire bottomCollision = (squareY+SQUARE_SIZE==479); wire leftCollision = (squareX-SQUARE_SIZE ==0); wire rightCollision = (squareX+SQUARE_SIZE == 639);   always @(posedge clock25MHz) begin if(topCollision) vSpeed&lt;=1; if(bottomCollision) vSpeed&lt;=0; if(leftCollision) hSpeed&lt;=1; if(rightCollision) hSpeed&lt;=0; counter &lt;= counter + 1; squareX &lt;= squareX + (hSpeed==1? 1 : -1); squareY &lt;= squareY + (vSpeed==1? 1 : -1); end  \/\/ Drawing a square wire square = (squareX-SQUARE_SIZE&lt;=x &amp;&amp; squareX+SQUARE_SIZE>=x) &amp;&amp; (squareY-SQUARE_SIZE&lt;=y &amp;&amp; squareY+SQUARE_SIZE>=y);  assign red = (square) ? 4'hF: 0; assign green = (square) ? 4'hF: 0; assign blue = (square) ? 4'hF: 0; endmodule<\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n<p>The code works fine, but the square moves too fast.\u00a0Thus, we must slow it down somehow.\u00a0To do this, I created another reg and implemented in every clock&#8217;s rising edge.\u00a0Then, when the value of this reg becomes equal to some constant (<strong>SPEED_CONSTANT<\/strong>), I am changing the values of the squareX and squareY.<\/p>\n<details class=\"spoiler\">\n<summary>Slow moving square<\/summary>\n<div class=\"spoiler__content\">\n<pre><code class=\"vhdl\">module bouncingSquare( input clock25MHz, input [9:0] x, input [9:0] y, output [3:0] red, output [3:0] green, output [3:0] blue ); localparam SPEED_CONSTANT = 100000; localparam SQUARE_SIZE = 20;  \/\/ Position of a square reg [9:0] squareX =100; reg [9:0] squareY = 100;  \/\/ Counter for slowing down the animation reg [30:0] counter;  \/\/ Vertical and horizontal speeds \/\/ 1 - positive direction, 0 - negative direction reg vSpeed = 1; reg hSpeed = 1;  \/\/ Checking for collisions wire topCollision = (squareY-SQUARE_SIZE==0);    wire bottomCollision = (squareY+SQUARE_SIZE==479); wire leftCollision = (squareX-SQUARE_SIZE ==0); wire rightCollision = (squareX+SQUARE_SIZE == 639);   always @(posedge clock25MHz) begin if(topCollision) vSpeed&lt;=1; if(bottomCollision) vSpeed&lt;=0; if(leftCollision) hSpeed&lt;=1; if(rightCollision) hSpeed&lt;=0; counter &lt;= counter + 1; if (counter == SPEED_CONSTANT) begin squareX &lt;= squareX + (hSpeed==1? 1 : -1); squareY &lt;= squareY + (vSpeed==1? 1 : -1); end if(counter>SPEED_CONSTANT) counter&lt;=0; end  \/\/ Drawing a square wire square = (squareX-SQUARE_SIZE&lt;=x &amp;&amp; squareX+SQUARE_SIZE>=x) &amp;&amp; (squareY-SQUARE_SIZE&lt;=y &amp;&amp; squareY+SQUARE_SIZE>=y);  assign red = (square) ? 4'hF: 0; assign green = (square) ? 4'hF: 0; assign blue = (square) ? 4'hF: 0; endmodule<\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n<p>The video can be found here: <a href=\"https:\/\/drive.google.com\/file\/d\/1qqi2z0zGhGgQ0X3iOVaQpvcq5kk1JpeR\/view?usp=share_link\" rel=\"noopener noreferrer nofollow\">link<\/a><\/p>\n<h2>Switching between different test modes<\/h2>\n<p>I used both buttons and switches to display different tests.\u00a0<\/p>\n<p>Everything worked correctly with switches, however there was a problem with buttons &#8212; the tests either changed randomly either didn&#8217;t change at all.\u00a0This problem is called Button Bouncing.<br \/>Button Bounce\u00a0happens when you push a mechanical button.\u00a0When a button is being pushed, it tends to literally bounce upon the metal contact, which connects the circuit.\u00a0<\/p>\n<p>This effect is shown in the following picture:<\/p>\n<figure class=\"full-width\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/habrastorage.org\/r\/w1560\/getpro\/habr\/upload_files\/4e8\/c41\/a80\/4e8c41a80adadc20f2ea8ac89d07ede2.png\" width=\"1022\" height=\"516\" data-src=\"https:\/\/habrastorage.org\/getpro\/habr\/upload_files\/4e8\/c41\/a80\/4e8c41a80adadc20f2ea8ac89d07ede2.png\"\/><figcaption><\/figcaption><\/figure>\n<\/p>\n<p>To overcome this problem, I used the debouncing technique. You can read more information about it <a href=\"https:\/\/www.fpga4student.com\/2017\/04\/simple-debouncing-verilog-code-for.html\" rel=\"noopener noreferrer nofollow\"><u>here<\/u><\/a>.<\/p>\n<h2>Conclusion<\/h2>\n<p>I have described the key stages of creating a monitor tester using an FPGA board and Verilog HDL.\u00a0Areas of the project&#8217;s application: business (for example, in a stand for checking monitors in electronics store) and personal use.<\/p>\n<p>This work has been implemented in the scope of \u00abComputer Architecture\u00bb course in the\u00a0<a href=\"https:\/\/innopolis.university\/en\/\" rel=\"noopener noreferrer nofollow\"><u>Innopolis University<\/u><\/a>.\u00a0<\/p>\n<h2>Some examples<\/h2>\n<details class=\"spoiler\">\n<summary>Images<\/summary>\n<div class=\"spoiler__content\">\n<figure class=\"full-width\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/habrastorage.org\/r\/w780q1\/getpro\/habr\/upload_files\/ffc\/50a\/ca8\/ffc50aca8eb258cccbb23cdf52d1809b.jpeg\" width=\"1280\" height=\"958\" data-src=\"https:\/\/habrastorage.org\/getpro\/habr\/upload_files\/ffc\/50a\/ca8\/ffc50aca8eb258cccbb23cdf52d1809b.jpeg\" data-blurred=\"true\"\/><figcaption><\/figcaption><\/figure>\n<figure class=\"full-width\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/habrastorage.org\/r\/w780q1\/getpro\/habr\/upload_files\/485\/280\/6b6\/4852806b66c8807603f790fad27a36b7.jpeg\" width=\"1280\" height=\"958\" data-src=\"https:\/\/habrastorage.org\/getpro\/habr\/upload_files\/485\/280\/6b6\/4852806b66c8807603f790fad27a36b7.jpeg\" data-blurred=\"true\"\/><figcaption><\/figcaption><\/figure>\n<figure class=\"full-width\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/habrastorage.org\/r\/w780q1\/getpro\/habr\/upload_files\/3de\/231\/8b1\/3de2318b130d43653b69055af2be787c.jpeg\" width=\"1280\" height=\"958\" data-src=\"https:\/\/habrastorage.org\/getpro\/habr\/upload_files\/3de\/231\/8b1\/3de2318b130d43653b69055af2be787c.jpeg\" data-blurred=\"true\"\/><figcaption><\/figcaption><\/figure>\n<\/p>\n<\/div>\n<\/details>\n<h2>References<\/h2>\n<ol>\n<li>\n<p><a href=\"https:\/\/github.com\/nai1ka\/MonitorTester_FPGA\" rel=\"noopener noreferrer nofollow\">Project on the GitHub<\/a><\/p>\n<\/li>\n<li>\n<p><a href=\"https:\/\/www.fpga4student.com\/2017\/04\/simple-debouncing-verilog-code-for.html\" rel=\"noopener noreferrer nofollow\">Button debouncing<\/a><\/p>\n<\/li>\n<li>\n<p><a href=\"https:\/\/projectf.io\/posts\/fpga-graphics\/\" rel=\"noopener noreferrer nofollow\">VGA explained<\/a><\/p>\n<\/li>\n<li>\n<p><a href=\"https:\/\/drive.google.com\/file\/d\/1qqi2z0zGhGgQ0X3iOVaQpvcq5kk1JpeR\/view?usp=share_link\" rel=\"noopener noreferrer nofollow\">Video example<\/a><\/p>\n<\/li>\n<\/ol>\n<p><\/p>\n<\/div>\n<\/div>\n<\/div>\n<p><!----><!----><\/div>\n<p><!----><!----><br \/> \u0441\u0441\u044b\u043b\u043a\u0430 \u043d\u0430 \u043e\u0440\u0438\u0433\u0438\u043d\u0430\u043b \u0441\u0442\u0430\u0442\u044c\u0438 <a href=\"https:\/\/habr.com\/ru\/articles\/707224\/\"> https:\/\/habr.com\/ru\/articles\/707224\/<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<div><!--[--><!--]--><\/div>\n<div id=\"post-content-body\">\n<div>\n<div class=\"article-formatted-body article-formatted-body article-formatted-body_version-2\">\n<div xmlns=\"http:\/\/www.w3.org\/1999\/xhtml\">\n<h2>Introduction<\/h2>\n<p>In order not to buy a defective monitor, it is highly recommended to check it before buying. DE10-Lite is great for this because of a compact size and the presence of a VGA connector.<\/p>\n<h2>Hardware and software<\/h2>\n<ul>\n<li>\n<p>DE10-Lite board (based on Altera&#8217;s MAX 10 FPGA) <\/p>\n<\/li>\n<\/ul>\n<figure class=\"full-width\"><figcaption><\/figcaption><\/figure>\n<ul>\n<li>\n<p>Quartus Prime Lite Edition<\/p>\n<\/li>\n<li>\n<p>Verilog HDL<\/p>\n<\/li>\n<\/ul>\n<h2>Some words about VGA and clock division<\/h2>\n<p><strong>VGA<\/strong>\u00a0(Video Graphics Array) is an analogue interface used to display visual data on computer monitors.\u00a0Till a few years back, it was the most used display interface.\u00a0It is now\u00a0being slowly replaced by HDMI.<\/p>\n<p>To display an image using VGA, we must follow its specification:\u00a0<strong>timings<\/strong>\u00a0and\u00a0<strong>clock rate<\/strong>.\u00a0In this paragraph I will consider only the clock rate.\u00a0Information about the timing is provided in the next block.<\/p>\n<p>VGA needs\u00a0<strong>25.175\u00a0MHz<\/strong>\u00a0clock rate, but the DE10-Lite can only provide 10 MHz or 50 MHz clock.\u00a0Therefore, we must somehow obtain\u00a0<strong>25.175\u00a0MHz\u00a0<\/strong>by dividing or multiplying the existing clocks.\u00a0In this project, I will divide 50 MHz clock.\u00a0<\/p>\n<p>To obtain the required clock, I used\u00a0<strong>Altera Phase-Locked Loop (Altera PLL)\u00a0<\/strong>from the IP catalogue in Quartus Prime.<\/p>\n<h2>Displaying an image on the screen through the VGA protocol<\/h2>\n<p>In this project I will use 640&#215;480 at 60 Hz.\u00a0 <br \/>Therefore, we have to follow the following timings:<\/p>\n<figure class=\"full-width\"><figcaption><\/figcaption><\/figure>\n<details class=\"spoiler\">\n<summary>Code of the VGA controller<\/summary>\n<div class=\"spoiler__content\">\n<pre><code class=\"vhdl\">module VGA( input clock25MHz, output vsync, output hsync, output canDisplayImage, output reg[9:0] x, output reg[9:0] y ); reg [9:0] xCounter; reg [9:0] yCounter;  always @(posedge clock25MHz)  \/\/ horizontal counter begin  if (xCounter &lt; 799) xCounter &lt;= xCounter + 1; else xCounter &lt;= 0;               end    always @ (posedge clock25MHz)  \/\/ vertical counter begin  if (xCounter == 799)  \/\/ only counts up 1 count after horizontal finishes 800 counts begin if (yCounter &lt; 525)  \/\/ vertical counter (including off-screen vertical 45 pixels) total of 525 pixels yCounter &lt;= yCounter + 1; else yCounter &lt;= 0;               end   end  always @ (posedge clock25MHz) begin if(xCounter>=144 &amp;&amp; xCounter&lt;784) x=xCounter-144; else x = 0; if(yCounter>=35 &amp;&amp; yCounter &lt; 515) y = yCounter-35; else y = 0; end  assign hsync = (xCounter >= 0 &amp;&amp; xCounter &lt; 96) ? 1:0;  \/\/ hsync high for 96 counts                                                  assign vsync = (yCounter >= 0 &amp;&amp; yCounter &lt; 2) ? 1:0;   \/\/ vsync high for 2 counts assign canDisplayImage = ((xCounter > 144) &amp;&amp; (xCounter &lt;= 783))      &amp;&amp; ((yCounter > 35) &amp;&amp; (yCounter &lt;= 514));  endmodule<\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n<p>Now, when the board can display any image on a screen, it&#8217;s time to draw something.<\/p>\n<p>Using x and y, we can control each pixel.\u00a0For example, the part of the code that draws a white 100&#215;100 rectangle:<\/p>\n<details class=\"spoiler\">\n<summary>Drawing a 100&#215;100 square<\/summary>\n<div class=\"spoiler__content\">\n<pre><code>module tvPattern( input [9:0] x, input [9:0] y, output reg [3:0] red, output reg [3:0] green, output reg [3:0] blue);  always @(x||y) begin if(x>=0 &amp;&amp; x&lt;100 &amp;&amp; y>=0 &amp;&amp; y&lt;100))  begin red &lt;= 4'hF; green &lt;= 4'hF; blue &lt;= 4'hF; end end    endmodule<\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n<h2>Animated test<\/h2>\n<p>I decided to add an animated test (e.g. bouncing square).<br \/>The variables for squareX and squareY are created.\u00a0<br \/>Then, in sequential logic block <code>always @(posedge clock25MHz<\/code>), I\u00a0am checking\u00a0for collisions with\u00a0screen borders and if collision &#8212; change the direction of the square.<\/p>\n<details class=\"spoiler\">\n<summary>Moving square<\/summary>\n<div class=\"spoiler__content\">\n<pre><code class=\"vhdl\">module bouncingSquare( input clock25MHz, input [9:0] x, input [9:0] y, output [3:0] red, output [3:0] green, output [3:0] blue ); localparam SQUARE_SIZE = 20;  \/\/ Position of a square reg [9:0] squareX =100; reg [9:0] squareY = 100;  \/\/ Vertical and horizontal speeds \/\/ 1 - positive direction, 0 - negative direction reg vSpeed = 1; reg hSpeed = 1;  \/\/ Checking for collisions wire topCollision = (squareY-SQUARE_SIZE==0);     wire bottomCollision = (squareY+SQUARE_SIZE==479); wire leftCollision = (squareX-SQUARE_SIZE ==0); wire rightCollision = (squareX+SQUARE_SIZE == 639);   always @(posedge clock25MHz) begin if(topCollision) vSpeed&lt;=1; if(bottomCollision) vSpeed&lt;=0; if(leftCollision) hSpeed&lt;=1; if(rightCollision) hSpeed&lt;=0; counter &lt;= counter + 1; squareX &lt;= squareX + (hSpeed==1? 1 : -1); squareY &lt;= squareY + (vSpeed==1? 1 : -1); end  \/\/ Drawing a square wire square = (squareX-SQUARE_SIZE&lt;=x &amp;&amp; squareX+SQUARE_SIZE>=x) &amp;&amp; (squareY-SQUARE_SIZE&lt;=y &amp;&amp; squareY+SQUARE_SIZE>=y);  assign red = (square) ? 4'hF: 0; assign green = (square) ? 4'hF: 0; assign blue = (square) ? 4'hF: 0; endmodule<\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n<p>The code works fine, but the square moves too fast.\u00a0Thus, we must slow it down somehow.\u00a0To do this, I created another reg and implemented in every clock&#8217;s rising edge.\u00a0Then, when the value of this reg becomes equal to some constant (<strong>SPEED_CONSTANT<\/strong>), I am changing the values of the squareX and squareY.<\/p>\n<details class=\"spoiler\">\n<summary>Slow moving square<\/summary>\n<div class=\"spoiler__content\">\n<pre><code class=\"vhdl\">module bouncingSquare( input clock25MHz, input [9:0] x, input [9:0] y, output [3:0] red, output [3:0] green, output [3:0] blue ); localparam SPEED_CONSTANT = 100000; localparam SQUARE_SIZE = 20;  \/\/ Position of a square reg [9:0] squareX =100; reg [9:0] squareY = 100;  \/\/ Counter for slowing down the animation reg [30:0] counter;  \/\/ Vertical and horizontal speeds \/\/ 1 - positive direction, 0 - negative direction reg vSpeed = 1; reg hSpeed = 1;  \/\/ Checking for collisions wire topCollision = (squareY-SQUARE_SIZE==0);    wire bottomCollision = (squareY+SQUARE_SIZE==479); wire leftCollision = (squareX-SQUARE_SIZE ==0); wire rightCollision = (squareX+SQUARE_SIZE == 639);   always @(posedge clock25MHz) begin if(topCollision) vSpeed&lt;=1; if(bottomCollision) vSpeed&lt;=0; if(leftCollision) hSpeed&lt;=1; if(rightCollision) hSpeed&lt;=0; counter &lt;= counter + 1; if (counter == SPEED_CONSTANT) begin squareX &lt;= squareX + (hSpeed==1? 1 : -1); squareY &lt;= squareY + (vSpeed==1? 1 : -1); end if(counter>SPEED_CONSTANT) counter&lt;=0; end  \/\/ Drawing a square wire square = (squareX-SQUARE_SIZE&lt;=x &amp;&amp; squareX+SQUARE_SIZE>=x) &amp;&amp; (squareY-SQUARE_SIZE&lt;=y &amp;&amp; squareY+SQUARE_SIZE>=y);  assign red = (square) ? 4'hF: 0; assign green = (square) ? 4'hF: 0; assign blue = (square) ? 4'hF: 0; endmodule<\/code><\/pre>\n<\/p>\n<\/div>\n<\/details>\n<p>The video can be found here: <a href=\"https:\/\/drive.google.com\/file\/d\/1qqi2z0zGhGgQ0X3iOVaQpvcq5kk1JpeR\/view?usp=share_link\" rel=\"noopener noreferrer nofollow\">link<\/a><\/p>\n<h2>Switching between different test modes<\/h2>\n<p>I used both buttons and switches to display different tests.\u00a0<\/p>\n<p>Everything worked correctly with switches, however there was a problem with buttons &#8212; the tests either changed randomly either didn&#8217;t change at all.\u00a0This problem is called Button Bouncing.<br \/>Button Bounce\u00a0happens when you push a mechanical button.\u00a0When a button is being pushed, it tends to literally bounce upon the metal contact, which connects the circuit.\u00a0<\/p>\n<p>This effect is shown in the following picture:<\/p>\n<figure class=\"full-width\"><figcaption><\/figcaption><\/figure>\n<\/p>\n<p>To overcome this problem, I used the debouncing technique. You can read more information about it <a href=\"https:\/\/www.fpga4student.com\/2017\/04\/simple-debouncing-verilog-code-for.html\" rel=\"noopener noreferrer nofollow\"><u>here<\/u><\/a>.<\/p>\n<h2>Conclusion<\/h2>\n<p>I have described the key stages of creating a monitor tester using an FPGA board and Verilog HDL.\u00a0Areas of the project&#8217;s application: business (for example, in a stand for checking monitors in electronics store) and personal use.<\/p>\n<p>This work has been implemented in the scope of \u00abComputer Architecture\u00bb course in the\u00a0<a href=\"https:\/\/innopolis.university\/en\/\" rel=\"noopener noreferrer nofollow\"><u>Innopolis University<\/u><\/a>.\u00a0<\/p>\n<h2>Some examples<\/h2>\n<details class=\"spoiler\">\n<summary>Images<\/summary>\n<div class=\"spoiler__content\">\n<figure class=\"full-width\"><figcaption><\/figcaption><\/figure>\n<figure class=\"full-width\"><figcaption><\/figcaption><\/figure>\n<figure class=\"full-width\"><figcaption><\/figcaption><\/figure>\n<\/p>\n<\/div>\n<\/details>\n<h2>References<\/h2>\n<ol>\n<li>\n<p><a href=\"https:\/\/github.com\/nai1ka\/MonitorTester_FPGA\" rel=\"noopener noreferrer nofollow\">Project on the GitHub<\/a><\/p>\n<\/li>\n<li>\n<p><a href=\"https:\/\/www.fpga4student.com\/2017\/04\/simple-debouncing-verilog-code-for.html\" rel=\"noopener noreferrer nofollow\">Button debouncing<\/a><\/p>\n<\/li>\n<li>\n<p><a href=\"https:\/\/projectf.io\/posts\/fpga-graphics\/\" rel=\"noopener noreferrer nofollow\">VGA explained<\/a><\/p>\n<\/li>\n<li>\n<p><a href=\"https:\/\/drive.google.com\/file\/d\/1qqi2z0zGhGgQ0X3iOVaQpvcq5kk1JpeR\/view?usp=share_link\" rel=\"noopener noreferrer nofollow\">Video example<\/a><\/p>\n<\/li>\n<\/ol>\n<p><\/p>\n<\/div>\n<\/div>\n<\/div>\n<p><!----><!----><\/div>\n<p><!----><!----><br \/> \u0441\u0441\u044b\u043b\u043a\u0430 \u043d\u0430 \u043e\u0440\u0438\u0433\u0438\u043d\u0430\u043b \u0441\u0442\u0430\u0442\u044c\u0438 <a href=\"https:\/\/habr.com\/ru\/articles\/707224\/\"> https:\/\/habr.com\/ru\/articles\/707224\/<\/a><br \/><\/br><\/br><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"class_list":["post-401784","post","type-post","status-publish","format-standard","hentry"],"_links":{"self":[{"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/posts\/401784","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=401784"}],"version-history":[{"count":0,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=\/wp\/v2\/posts\/401784\/revisions"}],"wp:attachment":[{"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=401784"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=401784"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/savepearlharbor.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=401784"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}